Publications and conference proceedings

This page last updated: June 10, 1999

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March 1999 Electrical, thermal and optomechanical packaging of large 2D optoelectronic device arrays for free-space optical interconnects
M. H. Ayliffe, D. Kabal, F. Lacroix, E. Bernier, P. Khurana, A.G. Kirk, F.A.P. Tooley, and D.V. Plant
Journal of Optics A: Pure and Applied Optics, vol. 1, no. 2, March 1999, pp.267-271.
Innovative approaches to the design of a high-performance package module accommodating a 32 x 32 array of surface-active devices indium bump bonded to a 8 x 8 mm VLSI chip are described. Electrical, thermal and optomechanical design considerations are discussed and experimental performance results of a prototype implementation are presented.(7 references)
1998 Temperature Dependence of QCSE Device Characteristics and Performance
M.D. Venditti, D.N. Kabal, M.H. Ayliffe, D.V. Plant, F.A.P. Tooley, E. Richard, J. Currie, A.J. Springthorpe
Broadband Optical Networks and Technologies: An Emerging Reality/Optical MEMS/Smart Pixels/Organic Optics and Optoelectronics. 1998 IEEE/LEOS Summer Topical Meetings, pp.IV-17-18
The normal method of operation for a GaAs MQW quantum confined Stark effect (QCSE) reflection modulator is given for a device operating wavelength, taken as 852 nm for the analysis in this paper. Modulation in the intensity of a reference optical beam is achieved by shifting the wavelength to achieve both low reflectivity and high reflectivity. The figure of merit for a QCSE modulator is its change in reflectivity from the low state to the high state is given. (4 references)
August 1998 Design and Operation of an In Situ Microchannel Alignment-Detection System
B. Robertson, D. Kabal, G.C. Boisset, Y.S. Liu, W.M. Robertson, M.R. Taghizadeh, D.V. Plant
Applied Optics, vol. 37, no. 23, August 1998, pp.5368-5376
A nonobtrusive technique for measuring misalignment errors in multistage free-space optical interconnects is proposed. The technique makes use of dedicated microoptics to relay higher order dedicated alignment beams generated by an optical power supply onto alignment detectors located on the periphery of a smart pixel chip. An implementation of this technique for measuring lateral (x-y) misalignment error in a multistage optical backplane demonstrator is then presented. Performance parameters are analyzed and future directions such as photonic extensions to electronic boundary scan standards are suggested. (22 References).
May 1998 In situ measurement of misalignment errors in free-space optical interconnects
G.C. Boisset, D.R. Rolston, B. Robertson, Y.S. Liu, R. Iyer, D. Kabal, D.V. Plant
Journal of Lightwave Technology, vol. 16, no. 5 , May 1998, pp.847-858
A nonobtrusive technique for measuring misalignment errors in multistage free-space optical interconnects is proposed. The technique makes use of dedicated microoptics to relay higher order dedicated alignment beams generated by an optical power supply onto alignment detectors located on the periphery of a smart pixel chip. An implementation of this technique for measuring lateral (x-y) misalignment error in a multistage optical backplane demonstrator is then presented. Performance parameters are analyzed and future directions such as photonic extensions to electronic boundary scan standards are suggested. (22 References).
May 1998 Optomechanical, electrical, and thermal packaging of large 2D optoelectronic device arrays for free-space optical interconnects
M.H. Ayliffe, D. Kabal, P. Khurana, F.K. Lacroix, A.G. Kirk, F.A.P. Tooley, D.V. Plant
Proc. SPIE Optics in Computing ’98, Pierre H. Chavel; David A. Miller; Hugo Thienpont; Eds., vol. 3490, May 1998, pp. 502-505
1997 Microchannel Interconnect Design Issues
B. Robertson, Y.S.Liu, G.C. Boisset, M.H. Ayliffe, R. Iyer, D. Kabal, W.M. Robertson, H.S. Hinton, M.R. Taghizadeh, D.V. Plant
Proceedings of the Microlens Arrays conference, European Optical Society, Topical Meetings Digest, 1997
December 1997 Design, implementation, and characterization of an optical power supply spot-array generator for a four-stage free-space optical backplane
R. Iyer, Y.S. Liu, G. C. Boisset, D.J. Goodwill, M.H. Ayliffe, B. Robertson, W.M. Robertson, D. Kabal, F. Lacroix, D.V. Plant
Applied Optics, vol. 36, no. 35, Dec. 1997, pp. 9230-9242
The design and implementation of a robust, scalable, and modular optical power supply spot-array generator for a modulator-based free-space optical backplane demonstrator is presented. Four arrays of 8*4 spots with 6.47- mu m radii (at l/e/sup 2/ points) pitched at 125 mu m in the vertical direction and 250 mu m in the horizontal were required to provide the light for the optical interconnect. Tight system tolerances demanded careful optical design, robust optomechanics, and effective alignment techniques. Such as spot-array generation, polarization, power efficiency, and power uniformity are discussed. Characterization results are presented. (31 References).
October 1997 Optomechanics for a four-stage hybrid-self-electro-optic-device-based free-space optical backplane
G.C. Boisset, M.H. Ayliffe, B. Robertson, R. Iyer, Y.S. Liu, D.V. Plant, D.J. Goodwill, D. Kabal, D. Pavlasek
Applied Optics, vol. 36, no. 29, Oct. 1997, pp. 7341-7358
We present the design, fabrication, and testing of optomechanics for a free-space optical backplane mounted in a standard 6U VME backplane chassis. The optomechanics implement an optical interconnect consisting of lenslet-to-lenslet, as well as conventional lens-to-lens, links. Mechanical, optical, electrical, thermal, material, and fabrication constraints are studied. Design trade-offs that affect system scalability and ease of assembly are put forward and analyzed. Novel mounting techniques such as a thermal-loaded interference-fitted lens-mounting technique are presented and discussed. Diagnostic tools are developed to quantify the performance of the optomechanics, and experimental results are given and analyzed. (35 References).
Poster (10.6 MB) March 1997 Chip-on-board packaging of a Hybrid-SEED smart pixel array
D. Kabal., M.H. Ayliffe, G.C. Boisset, D.V. Plant, D.R. Rolston, M.B. Venditti
Proc. 1997 Optics in Computing, March 1997
We describe the design, modeling and fabrication of the chip-on-board packaging for a hybrid-SEED smart pixel array. An overview of the packaging techniques that have been applied to system demonstrators by PSG McGill is presented. In this paper, we will describe the packaging of a hybrid-SEED smart pixel array. This packaging was designed, modelled, fabricated and demonstrated for board-to-board and backplane optical interconnect applications. (8 References).
November 1996 4×4 vertical-cavity surface-emitting laser (VCSEL) and metal-semiconductor-metal (MSM) optical backplane
D.V. Plant, B. Robertson, H.S. Hinton, M.H. Ayliffe, G.C. Boisset, W. Hsiao, D. Kabal, N.H. Kim, Y.S. Liu, M.R. Otazo, D. Pavlasek, A.Z. Shang, J. Simmons, K. Song, D.A. Thompson, W.M. Robertson
Applied Optics, vol.35, no.32, Nov. 1996, pp.6365-8
We describe a system demonstrator based on vertical-cavity surface-emitting lasers, metal-semiconductor-metal detectors, printed circuit board (PCB) level optoelectronic device packaging, a compact bulk optical relay, and novel barrel/PCB optomechanics. The entire system was constructed in a standard VME electrical backplane chassis and was capable of operating at >1.7 Gbit/s of aggregate data capacity. In addition to the component technologies developed, we describe operational testing and characterization of the demonstrator. (8 References).
1996 A multistage CMOS-SEED optical backplane demonstration system
D.V. Plant, B. Robertson, H.S. Hinton, M.H. Ayliffe, G.C. Boisset, D.J. Goodwill, D.N. Kabal, R. Iyer, Y.S. Liu, D.R. Rolston, W.M. Robertson M.R. Taghizadeh
1996 International Topical Meeting on Optical Computing. Technical Digest. Japan Soc. Appl. Phys. Part 1, vol.1, 1996, pp.14-15
The design and operation of a multi-stage CMOS/SEED free-space optical backplane is described. The performance of the system demonstrator will be presented. (4 References).
1996 Optical, optomechanical, and optoelectronic design and operational testing of a multi-stage optical backplane demonstration system
D.V. Plant, B. Robertson, H.S. Hinton, M.H. Ayliffe, G.C. Boisset, D.J. Goodwill, D. Kabal, R. Iyer, Y.S. Liu, D.R. Rolston, M.B. Venditti, T.H. Szmanski, W.M. Robertson, M.R. Taghizadeh
Proceedings of the Third International Conference on Massively Parallel Processing Using Optical Interconnections, 1996, pp.306-312
In this paper, we describe the optical, optomechanical, and optoelectronic design of a multistage optical backplane demonstration system. In addition, operational testing and performance is discussed. (11 References).

Slides (672 K)
August 1996 Packaging of two-dimensional smart pixel arrays
D.N. Kabal, G.C. Boisset, D.R. Rolston, D.V. Plant
Advanced Applications of Lasers in Materials Processing/Broadband Optical Networks/Smart Pixels/Optical MEMs and Their Applications. IEEE/LEOS 1996 Summer Topical Meetings, August 1996, pp.53-54
The optomechanical and electronic packaging of two-dimensional smart pixel arrays present a series of constraints that complicate the application of standard electrical packaging approaches in system applications. Through the construction of demonstrator systems, we have designed, fabricated, and implemented smart pixel packaging which uniquely addresses the critical issues associated with successfully integrating two-dimensional optoelectronic device arrays into systems. In order to take full advantage of this class of optoelectronics, aggressive packaging solutions which use both existing and new microelectronic packaging technologies have been employed. Key system design considerations such as electrical bandwidth and connectivity, thermal management, and optical alignability have played a role in the choice of packaging solution. In this paper, we will describe smart pixel packaging designed, modelled, fabricated and demonstrated for board-to-board optical interconnect applications. (5 References).
August 1996 Design and testing of a smart pixel array for a four-stage optical backplane demonstrator
D.R. Rolston, D.V. Plant, H.S. Hinton, W.S. Hsiao, M.H. Ayliffe, D.N. Kabal, T.H. Szymanski
Advanced Applications of Lasers in Materials Processing/Broadband Optical Networks/Smart Pixels/Optical MEMs and Their Applications. IEEE/LEOS 1996 Summer Topical Meetings , pp.30-31
The initial characterization of a smart pixel array (SPA) for an optical backplane has been carried out. Initial measurements of the functionality and the performance have been done, and higher speed measurements will be carried out on custom printed circuit board (PCBs). This design will then be incorporated into a four-stage optical backplane demonstrator. (4 References).
April 1996 A hybrid-SEED smart pixel array for a four-stage intelligent optical backplane demonstrator
D.R. Rolston, D.V. Plant, T.H. Szymanski, H.S. Hinton, W.S. Hsiao, M.H. Ayliffe, D. Kabal, M.B. Venditti, P. Desai, A.V. Krishnamoorthy, K.W. Goossen, J.A. Walker, B. Tseng, S.P. Hui, J.E. Cunningham, W.Y. Jan
IEEE Journal on Selected Topics in Quantum Electronics, vol. 2, no. 1, April 1996, pp.97-105
This paper describes the VLSI design, layout, and testing of a Hybrid-SEED smart pixel array for a four-stage intelligent optical backplane. The Hybrid-SEED technology uses CMOS silicon circuitry with GaAs-AlGaAs multiple-quantum-well modulators and detectors. The chip has been designed based on the HyperPlane architecture and is composed of four smart pixels which act as a logical 4-bit parallel optical channel. It has the ability to recognize a 4-bit address header, inject electrical data onto the backplane, retransmit optical data, and extract optical data from the backplane. In addition, the smart pixel array can accommodate for optical inversions and bit permutations by appropriate selections of multiplexers. Initial data pertaining to the electrical performance of the chip will be provided and a complete logical description will be given. (18 References).
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